Design, Analysis and Test of Logic Circuits Under Uncertainty

Logic circuits are becoming increasingly susceptible to probabilistic behavior caused by external radiation and process variation. In addition, inherently probabilistic quantum- and nano-technologies are on the horizon as we approach the limits of CMOS scaling. Ensuring the reliability of such circuits despite the probabilistic behavior is a key challenge in IC design-one that necessitates a fundamental, probabilistic reformulation of synthesis and testing techniques. This monograph will present techniques for analyzing, designing, and testing logic circuits with probabilistic behavior.Design, Analysis and Test of Logic Circuits Under Uncertainty is written by Smita Krishnaswamy; Igor L. Markov; John P. Hayes and published by Springer. ISBNs for Design, Analysis and Test of Logic Circuits Under Uncertainty are 9789048196449, 9048196442 and the print ISBNs are 9789048196432, 9048196434. Additional ISBNs include 9789400797987.